Naganathan, Professor & Head, Department of CSE,Hindustan University,Tamilnadu , India.
DOI : 01.0401/ijaict.2014.03.09
International Journal of Advanced Information and Communication Technology
Received On : May 13, 2015
Revised On : June 21, 2015
Accepted On : July 15, 2015
Published On : August 05, 2015
Volume 02, Issue 08
Pages : 325-331
Abstract
This paper presents the design of Analog to Digital Convertor (ADC). For ADC there are mainly four different methods, Flash ADC, Pipelined ADC, Successive Approximation ADC, Sigma Delta ADC. The Flash ADC is the Fast ADC. For Designing the ADC, the design issues are important. The design issues which consist first CMOS inverter used in CDC architecture, MUX based Decoder. The parameters important are Static and Dynamic. In static parameters Differential Non Linearity Error (DNLE), Integral Non Linearity Error (INLE) and in dynamic parameters Signal to Noise Ratio (SNR ), Effective Number of Bits ( EONB ), Spurious-Free Dynamic Range (SFDR), Dynamic Range (DR).In this papers, the design and the results are with the help of Tanner Tool 13 software.
Keywords
ADC, DNLE, INLE, SNR, EONB, SFDR, DR, CDC, Mux based Decode, Tanner Tool 13.
Cite this article
Naganathan, “Estimation of Static and Dynamic Parameters of Flash ADC using 180 NM Technology” INTERNATIONAL JOURNAL OF ADVANCED INFORMATION AND COMMUNICATION TECHNOLOGY, pp.325-331, August 05, 2015.
Copyright
© 2015 Naganathan. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.